To determine the functionality of memory devices, the memory devices are typically tested. One type of test that is usually performed during testing determines whether any of the memory cells of a memory array fail to store data properly. If defective memory cells are detected, redundant memory included in the memory device may be used for replacement of the defective cells. The addresses corresponding to the defective memory cells are remapped such that data is written to and read from the redundant memory cells. The redundant memory is commonly arranged in banks, and remapping of the defective memory to a bank of redundant memory is accomplished by programming antifuses that control access to the redundant bank of memory. The antifuses are typically arranged in fuse bank regions, where the antifuses of a fuse bank region are associated with the banks of redundant memory for a region of the memory array.
FIG. 1 illustrates a flow diagram of a conventional method for programming antifuses of a memory device. A redundancy analyzer (RA) solution is calculated based on the location of any defective memory that is determined during testing at a step 102. Generally, the RA solution provides a solution for efficient use of the redundancy memory that is available on the memory device to replace the defective memory locations. The RA solution is then translated into bank and fuse addresses corresponding to the antifuses that should be programmed to remap defective memory locations to the redundancy memory that was calculated by the RA solution at a step 104. The bank and fuse addresses are stored programmatically in a fuse address array. Typically, the fuse address array is stored by the tester performing the testing. Conceptually, along one axis of the fuse address array is a list of the fuse identification (ID) of every possible antifuse on a memory device, and along a second axis is every memory device for a group of devices. The group of devices may be all of the memory devices of a single wafer, or all of the memory devices of a single lot of wafers. As a result of storing the data in the fuse address array, the particular antifuses that need to be programmed for each of the memory devices of the group is available for reference.
In programming the antifuses of the memory devices of the group, a subset of the group that includes several memory devices are positioned for programming by a tester. The term “touchdown” is commonly used to refer to each time a set of devices is positioned for programming. Each of the devices is positioned within a DUT of the tester, which stands for “device under test.” The term DUT is often used to refer to one of the positions available within the tester per touchdown. The number of DUTs available per touchdown ranges from one to more than 128, and the number is continually increasing as tester capabilities improve. Each of the DUTs includes contact terminals to electrically contact signal pins of the memory device when the memory device is positioned within the DUT. It is through the contact terminals that signals can be applied to the memory device for testing and programming. Signals that are typically applied to each device include control signals, address signals, clock signals, and data signals. It will be appreciated, however, that greater or fewer signals may be applied will depend on the particular device being programmed or tested.
In many conventional memory testers, the address signals provided to all the DUTs of a tester are the same and cannot be individually programmed. However, in the case of input/output (I/O) signals, a small vector memory (SVM) is provided for each DUT, and each SVM can be programmed such that unique I/O signals can be provided to each device.
In going through the process of programming the antifuses of the devices of each touchdown as shown in FIG. 1 at steps 106-110, the tester sequences through the list of the fuse IDs of the fuse address array. For each fuse ID, the tester evaluates the stored information to determine if any of the devices in the touchdown need the antifuse corresponding to the current fuse ID to be programmed. If none of the devices require programming of the antifuse, then the tester continues to the next fuse ID. However, at a step 112, if any one of the devices in the touchdown need the antifuse corresponding to the current fuse ID to be programmed, then the SVM for each DUT having a device in need of antifuse programming is programmed with a data value indicative of the bank address of the antifuse that needs to be programmed. For those devices in the touchdown that do not need the antifuse corresponding to the current fuse ID to be programmed, a null value is provided to the respective data pins instead.
The fuse address of the antifuse to be programmed is commonly applied to the address terminals of each of the DUTs as in step 114. For those devices receiving a null data value, the fuse address has no effect. However, for the devices also receiving a data value indicative of a particular fuse bank, the application of the fuse address triggers a fuse blow event that programs the antifuse corresponding to the bank address applied to the data pins of the device and the fuse address applied to the address pins of the device as in step 116. The fuse address must be held valid throughout the entire duration of the fuse blow event, otherwise, the fuse blow event is terminated and the antifuse will not be programmed.
Upon completion of the fuse blow event, at a step 118, the tester continues to the next fuse ID of the fuse address array, and the process of determining whether any of the devices in the touchdown require programming of the antifuse of the current fuse ID, and programming thereof if at least one device requires it, continues until all of the possible antifuses of the memory device are checked.
When using the conventional antifuse programming process, the time required for programming the memory devices of a touchdown is roughly the product of the time for a fuse blow event to be setup and completed and the number of unique antifuses that need to be programmed for all of the devices in the touchdown. The previously described antifuse programming process represents a significant portion of the total test time, and thus, it is desirable to reduce the time spent on testing or programming antifuses to increase test throughput. Therefore, there is a need for an apparatus and method that can reduce the time spent on programming antifuses.